1 #ifndef ROSE_BinaryAnalysis_InstructionEnumsM68k_H
2 #define ROSE_BinaryAnalysis_InstructionEnumsM68k_H
3 #include <featureTests.h>
4 #ifdef ROSE_ENABLE_BINARY_ANALYSIS
12 namespace BinaryAnalysis {
189 m68k_eam_unknown = 0,
255 m68k_unknown_instruction,
504 m68k_last_instruction
Freescale CPU32 (similar to MC68020 w/out bitfield insns.
RAM 0 permutation control register 2.
Signed divide 32-bit quotient with remainder.
MC68EC000 16-/32-bit embedded controller.
Test bit field and clear.
Address register indirect with pre decrement: -(An)
ROM base address register 0.
Floating-point integer part rounded-to-zero.
MAC 32-bit accumulator #2.
MAC 32-bit accumulator #1.
Floating-point negation with single-precision rounding.
Trap if greater or equal.
Access control register 2 (instruction).
Unsigned divide with optional remainder.
MAC 32-bit accumulator #3.
Floating-point branch if unordered or greater than.
Address register indirect: (An)
Memory indirect pre indexed.
Program counter indirect.
MC68040 third-generation 32-bit microprocessor.
Freescale ISA_B, improved data movement instructions, etc.
RAM 0 permutation control register 3.
Floating-point branch if unordered or greater than or equal.
Decrement and branch if equal.
MC68020 32-bit virtual memory microprocessor.
Move floating-point data with single-precision rounding.
Status register, including condition codes.
M68kInstructionKind
M68k instruction types.
Floating-point branch if greater or less than.
Decrement and branch if less than.
Floating-point control register.
MC68010 16-/32-bit virtual memory microprocessor.
Secondary module base address register.
Compare and swap with operands.
Module base address register.
Floating-point branch if not greater or less than.
Floating-point branch if signaling not equal.
Test bit field and change.
Floating-point branch if false.
Multiprocessor control register.
Floating-point branch if unordered.
Move MAC status register.
Move from source to destination (data, CCR, ACC, MACSR, MASK)
Unpack binary coded decimal.
Program counter indirect with index.
Multiply-accumulate registers (includes EMAC registers).
Take illegal instruction trap.
Floating-point square root with FPCR rounding.
MC68EC020 32-bit embedded controller.
Negate decimal with extend.
M68kSupervisorRegister
M68k supervisor registers.
Branch carry set (alias blo)
RAM 0 permutation control register 1.
MC68000 and embedded versions thereof.
Freescale EMAC_B, dual accumulation instructions.
Floating-point multiple with double-precision rounding.
Move condition code register.
Program counter indirect with displacement: (d_16,PC)
Floating-point subtract with single-precision rounding.
Embedded DRAM base address register.
Freescale ISA_A, the original ColdFire ISA (subset of M68000)
Move floating-point data with FPCR rounding.
Control addressing modes.
Subtract decimal with extend.
Extract bit field signed.
M68kEmacRegister
M68k EMAC registers.
Freescale CPUs based on Motorola 683xx.
MAC 32-bit accumulator #0.
Floating-point subtract with double-precision rounding.
Floating-point divide with single-precision rounding.
Floating-point branch if not equal.
Main namespace for the ROSE library.
Register direct addressing modes.
Decrement and branch if lower or same.
Interrupt vector base address.
Floating-point add with FPCR rounding.
Extract bit field unsigned.
Floating point registers.
Supervisor stack pointer.
Decrement and branch if greater or equal.
Floating-point multiply with single-precision rounding.
Floating-point multiply with FPCR rounding.
MC68020 and embedded versions thereof.
Memory indirect addressing modes.
MC68040 and embedded versions thereof.
Branch carry clear (alias bhs)
Floating-point no operation.
Decrement and branch if greater than.
M68kDataFormat
M68k data formats for floating-point operations.
Move address from source to destination.
Absolute data addressing.
Check register against bounds.
Floating-point branch if signaling equal.
Floating-point branch if ordered greater than.
Floating-point branch if equal.
Floating-point branch if greater than or equal.
MC68008 16-bit microprocessor with 8-bit external data bus.
Floating-point add with double-precision rounding.
Access control register 1 (data).
Floating-point branch if true.
Address register indirect with displacement: (d_16,An)
Signed divide with optional remainder.
Check register against bounds.
Floating-point branch if not greater than.
Addressing modes specific to m680{20,30,40}.
M68kRegisterClass
M68k register classes.
Floating-point branch if unordered or equal.
Special purpose registers.
Decrement and branch if cary clear.
Floating-point branch if ordered greater than or equal.
M68kFamily
Members of the Motorola Coldfire family of m68k processors.
Program counter indirect with scaled index and base displacement.
Floating-point negation with double-precision rounding.
Address space ID register.
Decrement and branch if overflow clear.
Freescale EMAC, enhanced multiply-accumulate ISA.
RAM 1 permutation control register 3.
Freescale FPU, original ColdFire floating point ISA.
Floating-point absolute value with double-precision rounding.
Move floating-point data with double-precision rounding.
M68kSpecialPurposeRegister
M68k special purpose registers.
Data register direct: Dn.
Freescale ISA_C, improved bit manipulation instructions.
Floating-point square root with double-precision rounding.
MC68LC040 32-bit embedded controller w/out FPU.
Three 32-bit words of binary coded decimal.
Extensions for ACC2 and ACC3.
Floating-point divide with FPCR rounding.
Freescale MAC, original ColdFire multiply-accumulate ISA.
Floating-point branch if not less than.
RAM 1 permutation control register 1.
RAM base address register 1.
Decrement and branch if plus.
Floating-point branch if signaling true.
Rotate right without extend.
Sign extend byte to longword.
64-bit floating point, "double real".
Push and invalidate cache pages.
Memory indirect post indexed.
Program counter memory indirect post indexed.
M68kMacRegister
M68k MAC registers.
Floating-point branch if less than or equal.
Floating-point instruction address register.
32-bit floating point, "single real".
Rotate right with extend.
MC68EC040 32-bit embedded controller w/out FPU or MMU.
Address register indirect with post increment: (An)+.
Access control register 0 (data).
Access control register 3 (instruction).
MC68000 16-/32-bit microprocessor.
Alterable addressing modes.
Floating-point branch if not less than or equal.
Decrement and branch if overflow set.
Floating-point branch if less than.
Floating-point add with single-precision rounding.
Floating-point branch if signaling false.
Address register indirect with scaled index and base displacement.
Floating-point branch if unordered or less or equal.
Decrement and branch if not equal.
Decrement and branch if less than or equal.
RAM base address register 0.
Unsigned divide 32-bit quotient with remainder.
Register indirect addressing modes.
Compare and swap with operand.
MMU base address register.
Floating-point subtract with FPCR rounding.
MC68012 84-pin PGA version of MC68010 supporting 2GB RAM.
Address register direct: An.
Extensions for ACC0 and ACC1.
Program counter memory indirect.
Floating-point branch if greater than.
96-bit floating point, "extended real".
Absolute data addressing long: (xxx).L.
ROM base address register 1.
RAM 1 permutation control register 2.
Rotate left without extend.
Move from MAC ACC register and clear.
MC68030 and embedded versions thereof.
Floating-point branch if ordered less than or equal.
Decrement and branch if true.
Push and invalidate cache lines.
MC68EC030 32-bit embedded controller.
Address register indirect with scaled index.
MC68030 second-generation 32-bit enhanced microprocessor.
Floating-point branch if not greater, less, or equal.
Floating-point branch if greater, less, or equal.
Floating-point branch if ordered.
MC68HC000 low-power CMOS version of MC68000.
Floating-point absolute value with single-precision rounding.
Decrement and branch if high.
Return and restore condition codes.
Floating-point integer part.
Floating-point divide with double-precision rounding.
Floating-point branch if not greater than or equal.
Move multiple floating-point data registers.
Floating-point branch if unordered less than.
Move MAC ACCext register.
All register direct addressing modes.
Floating-pont negate with FPCR rounding.
Decrement and branch if false.
Floating-point absolute value with FPCR rounding.
Compare register against bounds.
M68kEffectiveAddressMode
M68k effective addressing modes.
Floating-point branch if ordered greater or less than.
Address register indirect with scaled index and 8-bit displacement.
Floating-point branch if ordered less than.
Floating-point status register.
Floating-point square root with single-precision rounding.
Decrement and branch if carry set.
Absolute data addressing short: (xxx).W.
Program counter indirect with scaled index and 8-bit displacement.
Add decimal with extended.
Program counter memory indirect pre indexed.
Decrement and branch if minus.