DisassemblerX86 Class Reference

#include <DisassemblerX86.h>

Inheritance diagram for DisassemblerX86:

[legend]Collaboration diagram for DisassemblerX86:

[legend]List of all members.

---

Detailed Description

Disassembler for the x86 architecture.

Most of the useful disassembly methods can be found in the superclass. There's really not much reason to use this class directly or to call any of these methods directly.

Public Member Functions
	DisassemblerX86 (size_t wordsize)
	DisassemblerX86 (const DisassemblerX86 &other)
virtual	~DisassemblerX86 ()
virtual DisassemblerX86 *	clone () const
	Creates a new copy of a disassembler.
virtual bool	can_disassemble (SgAsmGenericHeader *) const
	See Disassembler::can_disassemble.
virtual SgAsmInstruction *	disassembleOne (const MemoryMap *map, rose_addr_t start_va, AddressSet *successors=NULL)
	See Disassembler::disassembleOne.
virtual SgAsmInstruction *	make_unknown_instruction (const Exception &)
	Make an unknown instruction from an exception.
Private Types
	rmLegacyByte
	rmRexByte
	rmWord
	rmDWord
	rmQWord
	rmSegment
	rmST
	rmMM
	rmXMM
	rmControl
	rmDebug
	rmReturnNull
	mmNone
	mmF3
	mm66
	mmF2
enum	RegisterMode {   rmLegacyByte,   rmRexByte,   rmWord,   rmDWord,   rmQWord,   rmSegment,   rmST,   rmMM,   rmXMM,   rmControl,   rmDebug,   rmReturnNull }
	ModR/M settings that create register expressions (or rmReturnNull for no register). More...
enum	MMPrefix {   mmNone,   mmF3,   mm66,   mmF2 }
Private Member Functions
uint8_t	getByte ()
	Returns the next byte of the instruction by looking at the insnbuf, insnbufsz, and insnbufat data members that were set by startInstruction().
uint16_t	getWord ()
	Returns the next two-byte, little endian word of the instruction by looking at the insnbuf, insnbufsz, and insnbufat data members that were set by startInstruction().
uint32_t	getDWord ()
	Returns the next four-byte, little endian double word of the instruction by looking at the insnbuf, insnbufsz, and insnbufat data members that were set by startInstruction().
uint64_t	getQWord ()
	Returns the next eight-byte, little endian quad word of the instruction by looking at the insnbuf, insnbufsz, and insnbufat data members that were set by startInstruction().
SgAsmExpression *	currentDataSegment () const
	Constructs a register reference expression for the current data segment based on whether a segment override prefix has been encountered.
X86InstructionSize	effectiveAddressSize () const
	Returns the size of instruction addresses.
RegisterMode	effectiveOperandMode () const
	Returns the register mode for the instruction's effective operand size.
X86InstructionSize	effectiveOperandSize () const
	Returns the size of the operands.
SgAsmType *	effectiveOperandType () const
	Returns the data type for the instruction's effective operand size.
bool	longMode () const
	Returns true if we're disassembling 64-bit code.
MMPrefix	mmPrefix () const
void	not64 () const
	Throws an exception if the instruction being disassembled is not valid for 64-bit mode.
void	setRex (uint8_t prefix)
	Sets the rexPresent flag along with rexW, rexR, rexX, and/or rexB based on the instruction prefix, which should be a value between 0x40 and 0x4f, inclusive.
SgAsmExpression *	makeAddrSizeValue (int64_t val, size_t bit_offset, size_t bit_size)
	Constructs an expression for the specified address size.
SgAsmx86Instruction *	makeInstruction (X86InstructionKind kind, const std::string &mnemonic, SgAsmExpression *op1=NULL, SgAsmExpression *op2=NULL, SgAsmExpression *op3=NULL, SgAsmExpression *op4=NULL)
	Creates an instruction with optional operands.
SgAsmx86RegisterReferenceExpression *	makeIP ()
	Constructs a register reference expression for the instruction pointer register.
SgAsmx86RegisterReferenceExpression *	makeOperandRegisterByte (bool rexExtension, uint8_t registerNumber)
SgAsmx86RegisterReferenceExpression *	makeOperandRegisterFull (bool rexExtension, uint8_t registerNumber)
SgAsmx86RegisterReferenceExpression *	makeRegister (uint8_t fullRegisterNumber, RegisterMode, SgAsmType *registerType=NULL) const
	Constructs a register reference expression.
SgAsmx86RegisterReferenceExpression *	makeRegisterEffective (uint8_t fullRegisterNumber)
SgAsmx86RegisterReferenceExpression *	makeRegisterEffective (bool rexExtension, uint8_t registerNumber)
SgAsmExpression *	makeSegmentRegister (X86SegmentRegister so, bool insn64) const
	Constructs a register reference expression for a segment register.
void	getModRegRM (RegisterMode regMode, RegisterMode rmMode, SgAsmType *t, SgAsmType *tForReg=NULL)
	Decodes the ModR/M byte of an instruction.
SgAsmMemoryReferenceExpression *	decodeModrmMemory ()
	Decodes the ModR/M byte to a memory reference expression.
void	fillInModRM (RegisterMode rmMode, SgAsmType *t)
	If ModR/M is a memory reference, fill in its type; otherwise, make a register with the appropriate mode and put it into the modrm data member.
SgAsmExpression *	makeModrmNormal (RegisterMode, SgAsmType *mrType)
	Builds the register or memory reference expression for the ModR/M byte.
SgAsmx86RegisterReferenceExpression *	makeModrmRegister (RegisterMode, SgAsmType *mrType=NULL)
	Builds the register reference expression for the ModR/M byte.
void	requireMemory () const
	Throw an exceptions if the instruction requires the "Mod" part of the ModR/M byte to have the value 3.
SgAsmExpression *	getImmByte ()
SgAsmExpression *	getImmWord ()
SgAsmExpression *	getImmDWord ()
SgAsmExpression *	getImmQWord ()
SgAsmExpression *	getImmForAddr ()
SgAsmExpression *	getImmIv ()
SgAsmExpression *	getImmJz ()
SgAsmExpression *	getImmByteAsIv ()
SgAsmExpression *	getImmIzAsIv ()
SgAsmExpression *	getImmJb ()
SgAsmx86Instruction *	disassemble ()
	Disassembles an instruction.
SgAsmx86Instruction *	decodeOpcode0F ()
	Disassemble an instruction following the 0x0f prefix.
SgAsmx86Instruction *	decodeOpcode0F38 ()
	Disassemble SSE3 instructions.
SgAsmx86Instruction *	decodeX87InstructionD8 ()
	Disassembles an instruction with primary opcode 0xd8.
SgAsmx86Instruction *	decodeX87InstructionD9 ()
	Disassembles an instruction with primary opcode 0xd9.
SgAsmx86Instruction *	decodeX87InstructionDA ()
	Disassembles an instruction with primary opcode 0xda.
SgAsmx86Instruction *	decodeX87InstructionDB ()
	Disassembles an instruction with primary opcode 0xdb.
SgAsmx86Instruction *	decodeX87InstructionDC ()
	Disassembles an instruction with primary opcode 0xdc.
SgAsmx86Instruction *	decodeX87InstructionDD ()
	Disassembles an instruction with primary opcode 0xdd.
SgAsmx86Instruction *	decodeX87InstructionDE ()
	Disassembles an instruction with primary opcode 0xde.
SgAsmx86Instruction *	decodeX87InstructionDF ()
	Disassembles an instruction with primary opcode 0xdf.
SgAsmx86Instruction *	decodeGroup1 (SgAsmExpression *imm)
	Disassembles ADD, OR, ADC, SBB, AND, SUB, XOR, CMP.
SgAsmx86Instruction *	decodeGroup1a ()
	Disassembles POP.
SgAsmx86Instruction *	decodeGroup2 (SgAsmExpression *count)
	Disassembles ROL, ROR, RCL, RCR, SHL, SHR, SHL, SAR.
SgAsmx86Instruction *	decodeGroup3 (SgAsmExpression *immMaybe)
	Disassembles TEST, NOT, NEG, MUL, IMUL, DIV, IDIV.
SgAsmx86Instruction *	decodeGroup4 ()
	Disassembles INC, DEC.
SgAsmx86Instruction *	decodeGroup5 ()
	Disassembles INC, DEC, CALL, FARCALL, JMP, FARJMP, PUSH.
SgAsmx86Instruction *	decodeGroup6 ()
	Disassembles SLDT, STR, LLDT, LTR, VERR, VERW.
SgAsmx86Instruction *	decodeGroup7 ()
	Disassembles VMCALL, VMLAUNCH, VMRESUME, VMXOFF, SGDT, MONITOR, MWAIT, SIDT, SGDT, XGETBV, XSETBV, LGDT, VMRUN, VMMCALL, VMLOAD, VMSAVE, STGI, CLGI, SKINIT, INVLPGA, LIDT, SMSW, LMSW, SWAPGS, RDTSCP, INVLPG.
SgAsmx86Instruction *	decodeGroup8 (SgAsmExpression *imm)
	Disassembles BT, BTS, BTR, BTC.
SgAsmx86Instruction *	decodeGroup11 (SgAsmExpression *imm)
	Disassembles MOV.
SgAsmx86Instruction *	decodeGroup15 ()
	Disassembles FXSAVE, FXRSTOR, LDMXCSR, STMXCSR, XSAVE, LFENCE, XRSTOR, MFENCE, SFENCE, CLFLUSH.
SgAsmx86Instruction *	decodeGroup16 ()
	Disassembles PREFETCHNTA, PREFETCH0, PREFETCH1, PREFETCH2, PREFETCH.
SgAsmx86Instruction *	decodeGroupP ()
	Disassembles PREFETCH, PREFETCHW.
void	init (size_t wordsize)
	Initialize instances of this class.
void	startInstruction (SgAsmx86Instruction *insn)
	Resets disassembler state to beginning of an instruction for assembly.
void	startInstruction (rose_addr_t start_va, const uint8_t *buf, size_t bufsz)
	Resets disassembler state to beginning of an instruction for disassembly.
Static Private Member Functions
static RegisterMode	sizeToMode (X86InstructionSize)
	Returns the register mode for the specified instruction size.
static SgAsmType *	sizeToType (X86InstructionSize s)
	Returns a data type associated with an instruction size.
Private Attributes
X86InstructionSize	insnSize
	Default size of instructions, based on architecture; see init().
uint64_t	ip
	Virtual address for start of instruction.
SgUnsignedCharList	insnbuf
	Buffer containing bytes of instruction.
size_t	insnbufat
	Index of next byte to be read from or write to insnbuf.
X86SegmentRegister	segOverride
	Set to other than x86_segreg_none by 0x26,0x2e,0x36,0x3e,0x64,0x65 prefixes.
X86BranchPrediction	branchPrediction
bool	branchPredictionEnabled
bool	rexPresent
bool	rexW
bool	rexR
bool	rexX
bool	rexB
	Set by 0x40-0x4f prefixes; extended registers present; see setRex().
bool	sizeMustBe64Bit
	Set if effective operand size must be 64 bits.
bool	operandSizeOverride
	Set by the 0x66 prefix; used by effectiveOperandSize() and mmPrefix().
bool	addressSizeOverride
	Set by the 0x67 prefix; used by effectiveAddressSize().
bool	lock
	Set by the 0xf0 prefix.
X86RepeatPrefix	repeatPrefix
	Set by 0xf2 (repne) and 0xf3 (repe) prefixes.
bool	modregrmByteSet
	True if modregrmByte is initialized.
uint8_t	modregrmByte
	Set by instructions that use ModR/M when the ModR/M byte is read.
uint8_t	modeField
	Value (0-3) of high-order two bits of modregrmByte; see getModRegRM().
uint8_t	regField
	Value (0-7) of bits 3-5 inclusive of modregrmByte; see getModRegRM().
uint8_t	rmField
	Value (0-7) of bits 0-3 inclusive of modregrmByte; see getModRegRM().
SgAsmExpression *	modrm
	Register or memory ref expr built from modregrmByte; see getModRegRM().
SgAsmExpression *	reg
	Register reference expression built from modregrmByte; see getModRegRM().
bool	isUnconditionalJump
	True for jmp, farjmp, ret, retf, iret, and hlt.
Classes
class	ExceptionX86
	Same as Disassembler::Exception except with a different constructor for ease of use in DisassemblerX86. More...

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Member Enumeration Documentation

enum DisassemblerX86::RegisterMode [private]

ModR/M settings that create register expressions (or rmReturnNull for no register).

Enumerator:

rmLegacyByte
rmRexByte
rmWord
rmDWord
rmQWord
rmSegment
rmST
rmMM
rmXMM
rmControl
rmDebug
rmReturnNull

enum DisassemblerX86::MMPrefix [private]

Enumerator:

mmNone
mmF3
mm66
mmF2

---

Constructor & Destructor Documentation

DisassemblerX86::DisassemblerX86

(

size_t

wordsize

)

[inline]

DisassemblerX86::DisassemblerX86

(

const DisassemblerX86 &

other

)

[inline]

virtual DisassemblerX86::~DisassemblerX86

(

)

[inline, virtual]

---

Member Function Documentation

virtual DisassemblerX86* DisassemblerX86::clone

(

)

const [inline, virtual]

Creates a new copy of a disassembler.

The new copy has all the same settings as the original.

Thread safety: The thread safety of this virtual method depends on the implementation in the subclass.

Implements Disassembler.

bool DisassemblerX86::can_disassemble

(

SgAsmGenericHeader *

)

const [virtual]

See Disassembler::can_disassemble.

Implements Disassembler.

SgAsmInstruction * DisassemblerX86::disassembleOne	(	const MemoryMap *	map,
		rose_addr_t	start_va,
		AddressSet *	successors = NULL
	)			[virtual]

See Disassembler::disassembleOne.

Implements Disassembler.

SgAsmInstruction * DisassemblerX86::make_unknown_instruction

(

const Exception &

)

[virtual]

Make an unknown instruction from an exception.

uint8_t DisassemblerX86::getByte

(

)

[private]

Returns the next byte of the instruction by looking at the insnbuf, insnbufsz, and insnbufat data members that were set by startInstruction().

Throws an exception for short reads or if we've read more than 15 bytes. The longest possible x86 instruction is 15 bytes.

uint16_t DisassemblerX86::getWord

(

)

[private]

Returns the next two-byte, little endian word of the instruction by looking at the insnbuf, insnbufsz, and insnbufat data members that were set by startInstruction().

Throws an exception for short reads or if we've read more than 15 bytes. The longest possible x86 instruction is 15 bytes.

uint32_t DisassemblerX86::getDWord

(

)

[private]

Returns the next four-byte, little endian double word of the instruction by looking at the insnbuf, insnbufsz, and insnbufat data members that were set by startInstruction().

Throws an exception for short reads or if we've read more than 15 bytes. The longest possible x86 instruction is 15 bytes.

uint64_t DisassemblerX86::getQWord

(

)

[private]

Returns the next eight-byte, little endian quad word of the instruction by looking at the insnbuf, insnbufsz, and insnbufat data members that were set by startInstruction().

Throws an exception for short reads or if we've read more than 15 bytes. The longest possible x86 instruction is 15 bytes.

SgAsmExpression * DisassemblerX86::currentDataSegment

(

)

const [private]

Constructs a register reference expression for the current data segment based on whether a segment override prefix has been encountered.

X86InstructionSize DisassemblerX86::effectiveAddressSize

(

)

const [private]

Returns the size of instruction addresses.

The effective address size is normally based on the default instruction size. However, if the disassembler encounters the 0x67 instruction prefix ("Address-size Override Prefix") as indicated by the addressSizeOverride data member being set, then other sizes are used. See pattent 6571330.

RegisterMode DisassemblerX86::effectiveOperandMode

(

)

const [inline, private]

Returns the register mode for the instruction's effective operand size.

X86InstructionSize DisassemblerX86::effectiveOperandSize

(

)

const [private]

Returns the size of the operands.

The operand size is normally based on the default instruction size; however, if the disassembler encounters the 0x66 instruction prefix ("Precision-size Override Prefix") as indicated by the operandSizeOverride data member being set, then other sizes are used. See pattent 6571330.

SgAsmType* DisassemblerX86::effectiveOperandType

(

)

const [inline, private]

Returns the data type for the instruction's effective operand size.

bool DisassemblerX86::longMode

(

)

const [inline, private]

Returns true if we're disassembling 64-bit code.

DisassemblerX86::MMPrefix DisassemblerX86::mmPrefix

(

)

const [private]

void DisassemblerX86::not64

(

)

const [inline, private]

Throws an exception if the instruction being disassembled is not valid for 64-bit mode.

void DisassemblerX86::setRex

(

uint8_t

prefix

)

[private]

Sets the rexPresent flag along with rexW, rexR, rexX, and/or rexB based on the instruction prefix, which should be a value between 0x40 and 0x4f, inclusive.

DisassemblerX86::RegisterMode DisassemblerX86::sizeToMode

(

X86InstructionSize

)

[static, private]

Returns the register mode for the specified instruction size.

SgAsmType * DisassemblerX86::sizeToType

(

X86InstructionSize

s

)

[static, private]

Returns a data type associated with an instruction size.

For instance, a 32-bit instruction returns the type for a double word.

SgAsmExpression * DisassemblerX86::makeAddrSizeValue	(	int64_t	val,
		size_t	bit_offset,
		size_t	bit_size
	)			[private]

Constructs an expression for the specified address size.

The bit_offset and bit_size are the offset and size where val was found in the instruction raw bytes.

SgAsmx86Instruction * DisassemblerX86::makeInstruction	(	X86InstructionKind	kind,
		const std::string &	mnemonic,
		SgAsmExpression *	op1 = NULL,
		SgAsmExpression *	op2 = NULL,
		SgAsmExpression *	op3 = NULL,
		SgAsmExpression *	op4 = NULL
	)			[private]

Creates an instruction with optional operands.

Many of the instruction attributes come from the current state of this disassembler object (see the instruction-related data members below). In order that the new instruction contains the correct number of raw instruction bytes (p_raw_bytes) it should be called after all the instruction bytes have been read, otherwise remember to call set_raw_bytes() explicitly.

SgAsmx86RegisterReferenceExpression * DisassemblerX86::makeIP

(

)

[private]

Constructs a register reference expression for the instruction pointer register.

SgAsmx86RegisterReferenceExpression * DisassemblerX86::makeOperandRegisterByte	(	bool	rexExtension,
		uint8_t	registerNumber
	)			[private]

SgAsmx86RegisterReferenceExpression * DisassemblerX86::makeOperandRegisterFull	(	bool	rexExtension,
		uint8_t	registerNumber
	)			[private]

SgAsmx86RegisterReferenceExpression * DisassemblerX86::makeRegister	(	uint8_t	fullRegisterNumber,
		RegisterMode	,
		SgAsmType *	registerType = NULL
	)			const [private]

Constructs a register reference expression.

The registerType is only used for vector registers that can have more than one type.

SgAsmx86RegisterReferenceExpression* DisassemblerX86::makeRegisterEffective

(

uint8_t

fullRegisterNumber

)

[inline, private]

SgAsmx86RegisterReferenceExpression* DisassemblerX86::makeRegisterEffective	(	bool	rexExtension,
		uint8_t	registerNumber
	)			[inline, private]

SgAsmExpression * DisassemblerX86::makeSegmentRegister	(	X86SegmentRegister	so,
		bool	insn64
	)			const [private]

Constructs a register reference expression for a segment register.

void DisassemblerX86::getModRegRM	(	RegisterMode	regMode,
		RegisterMode	rmMode,
		SgAsmType *	t,
		SgAsmType *	tForReg = NULL
	)			[private]

Decodes the ModR/M byte of an instruction.

The ModR/M byte is used to carry operand information when the first byte (after prefixes) cannot do so. It consists of three parts:

* Bits 6-7: the "Mod" (i.e., mode) bits. They are saved in the DisassemblerX86::modeField data member. A mode of 3 indicates that the "M" bits designate a register; otherwise the M bits are used for memory coding.

* Bits 3-5: the "R" (i.e., register) bits, saved in the DisassemblerX86::regField data member.

* Bits 0-2: the "M" (i.e., memory) bits, saved in the DisassemblerX86::rmField data member. These are used to specify or help specify a memory location except when the mode bits have the value 3.

The regMode is the register kind for the "R" bits and is used when constructing the DisassemblerX86::reg data member. The rmMode is the register kind for the "RM" field when the mode refers to a register.

SgAsmMemoryReferenceExpression * DisassemblerX86::decodeModrmMemory

(

)

[private]

Decodes the ModR/M byte to a memory reference expression.

See makeModrmNormal().

void DisassemblerX86::fillInModRM	(	RegisterMode	rmMode,
		SgAsmType *	t
	)			[private]

If ModR/M is a memory reference, fill in its type; otherwise, make a register with the appropriate mode and put it into the modrm data member.

SgAsmExpression * DisassemblerX86::makeModrmNormal	(	RegisterMode	,
		SgAsmType *	mrType
	)			[private]

Builds the register or memory reference expression for the ModR/M byte.

See getModRegRM().

SgAsmx86RegisterReferenceExpression * DisassemblerX86::makeModrmRegister	(	RegisterMode	,
		SgAsmType *	mrType = NULL
	)			[private]

Builds the register reference expression for the ModR/M byte.

See getModRegRM(). The mrType is only used for vector registers.

void DisassemblerX86::requireMemory

(

)

const [inline, private]

Throw an exceptions if the instruction requires the "Mod" part of the ModR/M byte to have the value 3.

SgAsmExpression * DisassemblerX86::getImmByte

(

)

[private]

SgAsmExpression * DisassemblerX86::getImmWord

(

)

[private]

SgAsmExpression * DisassemblerX86::getImmDWord

(

)

[private]

SgAsmExpression * DisassemblerX86::getImmQWord

(

)

[private]

SgAsmExpression * DisassemblerX86::getImmForAddr

(

)

[private]

SgAsmExpression * DisassemblerX86::getImmIv

(

)

[private]

SgAsmExpression * DisassemblerX86::getImmJz

(

)

[private]

SgAsmExpression * DisassemblerX86::getImmByteAsIv

(

)

[private]

SgAsmExpression * DisassemblerX86::getImmIzAsIv

(

)

[private]

SgAsmExpression * DisassemblerX86::getImmJb

(

)

[private]

SgAsmx86Instruction * DisassemblerX86::disassemble

(

)

[private]

Disassembles an instruction.

This is the workhorse: it reads and decodes bytes of the instruction in a huge switch statement.

SgAsmx86Instruction * DisassemblerX86::decodeOpcode0F

(

)

[private]

Disassemble an instruction following the 0x0f prefix.

SgAsmx86Instruction * DisassemblerX86::decodeOpcode0F38

(

)

[private]

Disassemble SSE3 instructions.

SgAsmx86Instruction * DisassemblerX86::decodeX87InstructionD8

(

)

[private]

Disassembles an instruction with primary opcode 0xd8.

SgAsmx86Instruction * DisassemblerX86::decodeX87InstructionD9

(

)

[private]

Disassembles an instruction with primary opcode 0xd9.

SgAsmx86Instruction * DisassemblerX86::decodeX87InstructionDA

(

)

[private]

Disassembles an instruction with primary opcode 0xda.

SgAsmx86Instruction * DisassemblerX86::decodeX87InstructionDB

(

)

[private]

Disassembles an instruction with primary opcode 0xdb.

SgAsmx86Instruction * DisassemblerX86::decodeX87InstructionDC

(

)

[private]

Disassembles an instruction with primary opcode 0xdc.

SgAsmx86Instruction * DisassemblerX86::decodeX87InstructionDD

(

)

[private]

Disassembles an instruction with primary opcode 0xdd.

SgAsmx86Instruction * DisassemblerX86::decodeX87InstructionDE

(

)

[private]

Disassembles an instruction with primary opcode 0xde.

SgAsmx86Instruction * DisassemblerX86::decodeX87InstructionDF

(

)

[private]

Disassembles an instruction with primary opcode 0xdf.

SgAsmx86Instruction * DisassemblerX86::decodeGroup1

(

SgAsmExpression *

imm

)

[private]

Disassembles ADD, OR, ADC, SBB, AND, SUB, XOR, CMP.

SgAsmx86Instruction * DisassemblerX86::decodeGroup1a

(

)

[private]

Disassembles POP.

SgAsmx86Instruction * DisassemblerX86::decodeGroup2

(

SgAsmExpression *

count

)

[private]

Disassembles ROL, ROR, RCL, RCR, SHL, SHR, SHL, SAR.

SgAsmx86Instruction * DisassemblerX86::decodeGroup3

(

SgAsmExpression *

immMaybe

)

[private]

Disassembles TEST, NOT, NEG, MUL, IMUL, DIV, IDIV.

SgAsmx86Instruction * DisassemblerX86::decodeGroup4

(

)

[private]

Disassembles INC, DEC.

SgAsmx86Instruction * DisassemblerX86::decodeGroup5

(

)

[private]

Disassembles INC, DEC, CALL, FARCALL, JMP, FARJMP, PUSH.

SgAsmx86Instruction * DisassemblerX86::decodeGroup6

(

)

[private]

Disassembles SLDT, STR, LLDT, LTR, VERR, VERW.

SgAsmx86Instruction * DisassemblerX86::decodeGroup7

(

)

[private]

Disassembles VMCALL, VMLAUNCH, VMRESUME, VMXOFF, SGDT, MONITOR, MWAIT, SIDT, SGDT, XGETBV, XSETBV, LGDT, VMRUN, VMMCALL, VMLOAD, VMSAVE, STGI, CLGI, SKINIT, INVLPGA, LIDT, SMSW, LMSW, SWAPGS, RDTSCP, INVLPG.

SgAsmx86Instruction * DisassemblerX86::decodeGroup8

(

SgAsmExpression *

imm

)

[private]

Disassembles BT, BTS, BTR, BTC.

SgAsmx86Instruction * DisassemblerX86::decodeGroup11

(

SgAsmExpression *

imm

)

[private]

Disassembles MOV.

SgAsmx86Instruction * DisassemblerX86::decodeGroup15

(

)

[private]

Disassembles FXSAVE, FXRSTOR, LDMXCSR, STMXCSR, XSAVE, LFENCE, XRSTOR, MFENCE, SFENCE, CLFLUSH.

SgAsmx86Instruction * DisassemblerX86::decodeGroup16

(

)

[private]

Disassembles PREFETCHNTA, PREFETCH0, PREFETCH1, PREFETCH2, PREFETCH.

SgAsmx86Instruction * DisassemblerX86::decodeGroupP

(

)

[private]

Disassembles PREFETCH, PREFETCHW.

void DisassemblerX86::init

(

size_t

wordsize

)

[private]

Initialize instances of this class.

Called by constructor.

void DisassemblerX86::startInstruction

(

SgAsmx86Instruction *

insn

)

[inline, private]

Resets disassembler state to beginning of an instruction for assembly.

void DisassemblerX86::startInstruction	(	rose_addr_t	start_va,
		const uint8_t *	buf,
		size_t	bufsz
	)			[inline, private]

Resets disassembler state to beginning of an instruction for disassembly.

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Member Data Documentation

X86InstructionSize DisassemblerX86::insnSize [private]

Default size of instructions, based on architecture; see init().

uint64_t DisassemblerX86::ip [private]

Virtual address for start of instruction.

SgUnsignedCharList DisassemblerX86::insnbuf [private]

Buffer containing bytes of instruction.

size_t DisassemblerX86::insnbufat [private]

Index of next byte to be read from or write to insnbuf.

X86SegmentRegister DisassemblerX86::segOverride [private]

Set to other than x86_segreg_none by 0x26,0x2e,0x36,0x3e,0x64,0x65 prefixes.

X86BranchPrediction DisassemblerX86::branchPrediction [private]

bool DisassemblerX86::branchPredictionEnabled [private]

bool DisassemblerX86::rexPresent [private]

bool DisassemblerX86::rexW [private]

bool DisassemblerX86::rexR [private]

bool DisassemblerX86::rexX [private]

bool DisassemblerX86::rexB [private]

Set by 0x40-0x4f prefixes; extended registers present; see setRex().

bool DisassemblerX86::sizeMustBe64Bit [private]

Set if effective operand size must be 64 bits.

bool DisassemblerX86::operandSizeOverride [private]

Set by the 0x66 prefix; used by effectiveOperandSize() and mmPrefix().

bool DisassemblerX86::addressSizeOverride [private]

Set by the 0x67 prefix; used by effectiveAddressSize().

bool DisassemblerX86::lock [private]

Set by the 0xf0 prefix.

X86RepeatPrefix DisassemblerX86::repeatPrefix [private]

Set by 0xf2 (repne) and 0xf3 (repe) prefixes.

bool DisassemblerX86::modregrmByteSet [private]

True if modregrmByte is initialized.

uint8_t DisassemblerX86::modregrmByte [private]

Set by instructions that use ModR/M when the ModR/M byte is read.

uint8_t DisassemblerX86::modeField [private]

Value (0-3) of high-order two bits of modregrmByte; see getModRegRM().

uint8_t DisassemblerX86::regField [private]

Value (0-7) of bits 3-5 inclusive of modregrmByte; see getModRegRM().

uint8_t DisassemblerX86::rmField [private]

Value (0-7) of bits 0-3 inclusive of modregrmByte; see getModRegRM().

SgAsmExpression* DisassemblerX86::modrm [private]

Register or memory ref expr built from modregrmByte; see getModRegRM().

SgAsmExpression* DisassemblerX86::reg [private]

Register reference expression built from modregrmByte; see getModRegRM().

bool DisassemblerX86::isUnconditionalJump [private]

True for jmp, farjmp, ret, retf, iret, and hlt.

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The documentation for this class was generated from the following files:

• DisassemblerX86.h
• DisassemblerX86.C

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