| addressWidth() const | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | inline |
| addressWidth(size_t nbits) | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | |
| addrWidth_ | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | protected |
| advanceInstructionPointer(SgAsmInstruction *) | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | virtual |
| autoResetInstructionPointer() const | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | inline |
| autoResetInstructionPointer(bool b) | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | inline |
| autoResetInstructionPointer_ | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | protected |
| callReturnRegister() const override | Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc | virtual |
| create(const BaseSemantics::RiscOperatorsPtr &ops, size_t addrWidth=0, const RegisterDictionary *regs=NULL) const override | Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc | inlinevirtual |
| currentInstruction() const | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | virtual |
| currentState() const | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | virtual |
| decrementRegisters(SgAsmExpression *) | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | virtual |
| Dispatcher() (defined in Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher) | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | inlineprotected |
| Dispatcher(size_t addrWidth, const RegisterDictionary *regs) (defined in Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher) | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | inlineprotected |
| Dispatcher(const RiscOperatorsPtr &ops, size_t addrWidth, const RegisterDictionary *regs) (defined in Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher) | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | inlineprotected |
| DispatcherPowerpc() (defined in Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc) | Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc | inlineprotected |
| DispatcherPowerpc(size_t addrWidth, const RegisterDictionary *regs) (defined in Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc) | Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc | inlineprotected |
| DispatcherPowerpc(const BaseSemantics::RiscOperatorsPtr &ops, size_t addrWidth, const RegisterDictionary *regs) (defined in Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc) | Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc | inlineprotected |
| effectiveAddress(SgAsmExpression *, size_t nbits=0) | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | virtual |
| findRegister(const std::string ®name, size_t nbits=0, bool allowMissing=false) const | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | virtual |
| get_operators() const ROSE_DEPRECATED("use \"operators\" instead") (defined in Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher) | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | inlinevirtual |
| get_register_dictionary() const (defined in Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher) | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | inlinevirtual |
| incrementRegisters(SgAsmExpression *) | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | virtual |
| initializeState(const StatePtr &) | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | virtual |
| InsnProcessors typedef (defined in Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher) | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | protected |
| instance() | Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc | inlinestatic |
| instance(size_t addrWidth, const RegisterDictionary *regs=NULL) | Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc | inlinestatic |
| instance(const BaseSemantics::RiscOperatorsPtr &ops, size_t addrWidth, const RegisterDictionary *regs=NULL) | Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc | inlinestatic |
| instructionPointerRegister() const override | Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc | virtual |
| iproc_init() | Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc | protected |
| iproc_table (defined in Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher) | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | protected |
| iprocGet(int key) | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | virtual |
| iprocKey(SgAsmInstruction *insn_) const override | Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc | inlinevirtual |
| iprocLookup(SgAsmInstruction *insn) | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | virtual |
| iprocReplace(SgAsmInstruction *insn, InsnProcessor *iproc) | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | virtual |
| iprocSet(int key, InsnProcessor *iproc) | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | virtual |
| memory_init() | Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc | protected |
| number_(size_t nbits, uint64_t number) const | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | virtual |
| operators() const | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | inlinevirtual |
| operators(const RiscOperatorsPtr &ops) | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | virtual |
| postUpdate(SgAsmExpression *, const BaseSemantics::SValuePtr &enabled) | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | virtual |
| preUpdate(SgAsmExpression *, const BaseSemantics::SValuePtr &enabled) | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | virtual |
| processInstruction(SgAsmInstruction *insn) | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | virtual |
| promote(const BaseSemantics::DispatcherPtr &d) | Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc | inlinestatic |
| protoval() const | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | virtual |
| Ptr typedef | Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc | |
| read(SgAsmExpression *, size_t value_nbits=0, size_t addr_nbits=0) | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | virtual |
| readAndUpdate(BaseSemantics::RiscOperators *, SgAsmExpression *, size_t valueNBits) | Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc | |
| REG_CR | Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc | |
| REG_CR0 | Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc | |
| REG_CR0_LT | Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc | |
| REG_CTR | Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc | |
| REG_IAR | Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc | |
| REG_LR | Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc | |
| REG_XER | Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc | |
| REG_XER_CA | Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc | |
| REG_XER_OV | Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc | |
| REG_XER_SO | Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc | |
| regcache_init() | Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc | protected |
| regdict | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | protected |
| registerDictionary() const | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | inline |
| registerDictionary(const RegisterDictionary *rd) | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | inline |
| segmentRegister(SgAsmMemoryReferenceExpression *) | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | virtual |
| set_register_dictionary(const RegisterDictionary *regdict) override (defined in Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc) | Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc | virtual |
| setXerOverflow(const BaseSemantics::SValuePtr &hadOverflow) | Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc | |
| stackFrameRegister() const override | Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc | virtual |
| stackPointerRegister() const override | Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc | virtual |
| Super typedef | Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc | |
| undefined_(size_t nbits) const | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | virtual |
| unspecified_(size_t nbits) const | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | virtual |
| updateCr0(const BaseSemantics::SValuePtr &result) | Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc | virtual |
| write(SgAsmExpression *, const SValuePtr &value, size_t addr_nbits=0) | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | virtual |
| writeAndUpdate(BaseSemantics::RiscOperators *, SgAsmExpression *destination, const BaseSemantics::SValuePtr &value) | Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc | |
| ~Dispatcher() (defined in Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher) | Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | inlinevirtual |