#include <Cxx_Grammar.h>
Inheritance diagram for SgAsmx86Instruction:
Public Types | |
| typedef SgAsmInstruction | base_node_type |
| static_variant = V_SgAsmx86Instruction | |
| enum | { static_variant = V_SgAsmx86Instruction } |
| static variant value More... | |
Public Member Functions | |
| virtual SgNode * | copy (SgCopyHelp &help) const |
| virtual bool | terminatesBasicBlock () |
| virtual bool | is_function_call (const std::vector< SgAsmInstruction * > &, rose_addr_t *target) |
| virtual bool | is_function_return (const std::vector< SgAsmInstruction * > &) |
True if insns ends with a RET instruction. | |
| virtual bool | has_effect () |
| Determines whether a single instruction has an effect other than advancing the instruction pointer. | |
| virtual bool | has_effect (const std::vector< SgAsmInstruction * > &, bool allow_branch=false, bool relax_stack_semantics=false) |
| Determines whether a sequence of instructions has an effect besides advancing the flow of control. | |
| virtual std::vector< std::pair< size_t, size_t > > | find_noop_subsequences (const std::vector< SgAsmInstruction * > &insns, bool allow_branch=false, bool relax_stack_semantics=false) |
| Determines what subsequences of an instruction sequence have no cumulative effect. | |
| virtual std::set< rose_addr_t > | get_successors (bool *complete) |
| virtual std::set< rose_addr_t > | get_successors (const std::vector< SgAsmInstruction * > &, bool *complete, MemoryMap *initial_memory=NULL) |
| virtual bool | is_unknown () const |
| virtual std::string | class_name () const |
| Copies AST (whole subtree, depending on the SgCopyHelp class returns a string representing the class name. | |
| virtual VariantT | variantT () const |
| returns new style SageIII enum values | |
| void * | operator new (size_t size) |
| returns pointer to newly allocated IR node | |
| void | operator delete (void *pointer, size_t size) |
| deallocated memory for IR node (returns memory to memory pool for reuse) | |
| void | operator delete (void *pointer) |
| virtual std::vector< SgNode * > | get_traversalSuccessorContainer () |
| FOR INTERNAL USE within ROSE traverals mechanism only. | |
| virtual std::vector< std::string > | get_traversalSuccessorNamesContainer () |
| FOR INTERNAL USE within ROSE traverals mechanism only. | |
| virtual size_t | get_numberOfTraversalSuccessors () |
| virtual SgNode * | get_traversalSuccessorByIndex (size_t idx) |
| virtual size_t | get_childIndex (SgNode *child) |
| virtual RTIReturnType | roseRTI () |
| FOR INTERNAL USE Access to Runtime Type Information (RTI) for this IR nodes. | |
| virtual const char * | sage_class_name () const ROSE_DEPRECATED_FUNCTION |
| void | executeVisitorMemberFunction (ROSE_VisitorPattern &visitor) |
| FOR INTERNAL USE Support for visitor pattern. | |
| virtual void | accept (ROSE_VisitorPattern &visitor) |
| DXN (08/09/2010): support for the classic visitor pattern done in GoF. | |
| virtual bool | isInMemoryPool () |
| FOR INTERNAL USE This is used in internal tests to verify that all IR nodes are allocated from the heap. | |
| virtual void | checkDataMemberPointersIfInMemoryPool () |
| FOR INTERNAL USE This is used in internal tests to verify that all IR nodes are allocated from the heap. | |
| virtual std::vector< std::pair< SgNode *, std::string > > | returnDataMemberPointers () const |
| FOR INTERNAL USE Returns STL vector of pairs of SgNode* and strings for use in AST tools | |
| virtual void | processDataMemberReferenceToPointers (ReferenceToPointerHandler *) |
| FOR INTERNAL USE Processes pairs of references to SgNode* and strings for use in AST tools | |
| virtual long | getChildIndex (SgNode *childNode) const |
| FOR INTERNAL USE Returns a unique index value for the childNode in the list of children at this IR node. | |
| SgAsmx86Instruction (const SgAsmx86InstructionStorageClass &source) | |
| SgAsmx86Instruction * | addRegExpAttribute (std::string s, AstRegExAttribute *a) |
| Support for AST matching using regular expression. | |
| X86InstructionKind | get_kind () const |
| void | set_kind (X86InstructionKind kind) |
| X86InstructionSize | get_baseSize () const |
| void | set_baseSize (X86InstructionSize baseSize) |
| X86InstructionSize | get_operandSize () const |
| void | set_operandSize (X86InstructionSize operandSize) |
| X86InstructionSize | get_addressSize () const |
| void | set_addressSize (X86InstructionSize addressSize) |
| bool | get_lockPrefix () const |
| void | set_lockPrefix (bool lockPrefix) |
| X86RepeatPrefix | get_repeatPrefix () const |
| void | set_repeatPrefix (X86RepeatPrefix repeatPrefix) |
| X86BranchPrediction | get_branchPrediction () const |
| void | set_branchPrediction (X86BranchPrediction branchPrediction) |
| X86SegmentRegister | get_segmentOverride () const |
| void | set_segmentOverride (X86SegmentRegister segmentOverride) |
| virtual | ~SgAsmx86Instruction () |
| SgAsmx86Instruction (rose_addr_t address=0, std::string mnemonic="", X86InstructionKind kind=x86_unknown_instruction, X86InstructionSize baseSize=x86_insnsize_none, X86InstructionSize operandSize=x86_insnsize_none, X86InstructionSize addressSize=x86_insnsize_none) | |
Static Public Member Functions | |
| static size_t | numberOfNodes () |
| Returns the total number of IR nodes of this type. | |
| static size_t | memoryUsage () |
| Returns the size in bytes of the total memory allocated for all IR nodes of this type. | |
| static void | traverseMemoryPoolNodes (ROSE_VisitTraversal &visit) |
| FOR INTERNAL USE Support for visitor pattern. | |
| static void | traverseMemoryPoolVisitorPattern (ROSE_VisitorPattern &visitor) |
| FOR INTERNAL USE Support for visitor pattern. | |
| static void | visitRepresentativeNode (ROSE_VisitTraversal &visit) |
| FOR INTERNAL USE Support for type-based traversal. | |
Protected Attributes | |
| X86InstructionKind | p_kind |
| X86InstructionSize | p_baseSize |
| X86InstructionSize | p_operandSize |
| X86InstructionSize | p_addressSize |
| bool | p_lockPrefix |
| X86RepeatPrefix | p_repeatPrefix |
| X86BranchPrediction | p_branchPrediction |
| X86SegmentRegister | p_segmentOverride |
Friends | |
| class | AST_FILE_IO |
| class | SgAsmx86InstructionStorageClass |
| class | AstSpecificDataManagingClass |
| class | AstSpecificDataManagingClassStorageClass |
| SgAsmx86Instruction * | isSgAsmx86Instruction (SgNode *s) |
| Casts pointer from base class to derived class. | |
| const SgAsmx86Instruction * | isSgAsmx86Instruction (const SgNode *s) |
| Casts pointer from base class to derived class (for const pointers). | |
| SgAsmx86Instruction * | SgAsmx86Instruction_getPointerFromGlobalIndex (unsigned long globalIndex) |
| Constructor for use by AST File I/O MechanismTypedef used for low level memory access. Typedef used to hold memory addresses as values. Methods to find the pointer to a global and local index. | |
| unsigned long | SgAsmx86Instruction_getNumberOfValidNodesAndSetGlobalIndexInFreepointer (unsigned long) |
| Get the size of the memory pool. | |
| void | SgAsmx86Instruction_clearMemoryPool () |
| void | SgAsmx86Instruction_extendMemoryPoolForFileIO (unsigned long) |
| void | SgAsmx86Instruction_getNextValidPointer (std::pair< SgAsmx86Instruction *, std::vector< unsigned char * >::const_iterator > &) |
| void | SgAsmx86Instruction_resetValidFreepointers () |
Reimplemented from SgAsmInstruction.
| SgAsmx86Instruction::SgAsmx86Instruction | ( | const SgAsmx86InstructionStorageClass & | source | ) |
| virtual SgAsmx86Instruction::~SgAsmx86Instruction | ( | ) | [virtual] |
| SgAsmx86Instruction::SgAsmx86Instruction | ( | rose_addr_t | address = 0, |
|
| std::string | mnemonic = "", |
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| X86InstructionKind | kind = x86_unknown_instruction, |
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| X86InstructionSize | baseSize = x86_insnsize_none, |
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| X86InstructionSize | operandSize = x86_insnsize_none, |
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| X86InstructionSize | addressSize = x86_insnsize_none | |||
| ) |
| virtual SgNode* SgAsmx86Instruction::copy | ( | SgCopyHelp & | help | ) | const [virtual] |
Reimplemented from SgAsmInstruction.
| bool SgAsmx86Instruction::terminatesBasicBlock | ( | ) | [virtual] |
Reimplemented from SgAsmInstruction.
| bool SgAsmx86Instruction::is_function_call | ( | const std::vector< SgAsmInstruction * > & | , | |
| rose_addr_t * | target | |||
| ) | [virtual] |
Reimplemented from SgAsmInstruction.
| bool SgAsmx86Instruction::is_function_return | ( | const std::vector< SgAsmInstruction * > & | insns | ) | [virtual] |
True if insns ends with a RET instruction.
Eventually this could do something more sophisticated.
Reimplemented from SgAsmInstruction.
| bool SgAsmx86Instruction::has_effect | ( | ) | [virtual] |
Determines whether a single instruction has an effect other than advancing the instruction pointer.
Instructions that have no effect are called "no-ops". The NOP instruction is an example of a no-op, but there are others also. The following information is largely from Cory Cohen at CERT. In the discussion that follows, we are careful to distinguish between NOP (the mneumonic for instructions 90, and 0f1f) and "no-op" (any instruction whose only effect is to advance the instruction pointer).
Opcode bytes Intel assembly syntax -------------------- ---------------------- 90 nop 89c0 mov eax,eax Intel's old recommended two-byte no-op was to 89c9 mov ecx,ecx move a register to itself... The second byte of these are mod/rm 89d2 mov edx,edx bytes, and can generally be substituded wherever you see 0xc0 in 89db mov ebx,ebx subsequent examples. 89e4 mov esp,esp 89ed mov ebp,ebp 89f6 mov esi,esi 89ff mov edi,edi 88c0 mov al,al The above are also available in 8-bit form with a leading byte of 0x88 6689c0 mov ax,ax and with an operand size prefix (0x66). 66666689c0 mov ax,ax The prefixes can be repeated. One source seemed to imply that up to three are reliably supported by the actual Intel processors. ROSE supports any number up to the maximum instruction size (varies by mode). 6688c0 mov al,al The operand size prefix can even be nonsensical. 8ac0 mov al,al These are also presumabely no-ops. As with most instructions, these will 8bc0 mov eax,eax accept operand size prefixes as well. f090 lock nop Most of these instructions will accept a lock prefix as well, which does f0f090 lock nop not materially affect the result. As before, they can occur repeatedly, and f066f090 lock nop even in wacky combinations. f066f06666f0f066f090 lock nop f290 repne nop Cory Cohen strongly suspects that the other instruction prefixes are f390 rep nop ignored as well, although to be complete, we might want to conduct a few 2690 es nop tests into the behavior of common processors. 2e90 cs nop 3690 ss nop 3e90 ds nop 6490 fs nop 6590 gs nop 6790 nop 8d00 lea eax,[eax] Intel's old recommendation for larger no-ops was to use the LEA 8d09 lea ecx,[ecx] instruction in various dereferencing modes. 8d12 lea edx,[edx] 8d1b lea ebx,[ebx] 8d36 lea esi,[esi] 8d3f lea edi,[edi] 8d4000 lea eax,[eax+0x0] 8d4900 lea ecx,[ecx+0x0] 8d5200 lea edx,[edx+0x0] 8d5b00 lea ebx,[ebx+0x0] 8d7600 lea esi,[esi+0x0] 8d7f00 lea edi,[edi+0x0] 8d8000000000 lea eax,[eax+0x0] This last block is really the [reg*0x1+0x0] dereferencing mode. 8d8900000000 lea ecx,[ecx+0x0] 8d9200000000 lea edx,[edx+0x0] 8d9b00000000 lea ebx,[ebx+0x0] 8db600000000 lea esi,[esi+0x0] 8dbf00000000 lea edi,[edi+0x0] 8d0420 lea eax,[eax] Then there's funky equivalents involving SIB bytes. 8d0c21 lea ecx,[ecx] 8d1422 lea edx,[edx] 8d1c23 lea ebx,[ebx] 8d2424 lea esp,[esp] 8d3426 lea esi,[esi] 8d3c27 lea edi,[edi] 8d442000 lea eax,[eax+0x0] 8d4c2100 lea ecx,[ecx+0x0] 8d542200 lea edx,[edx+0x0] 8d5c2300 lea ebx,[ebx+0x0] 8d642400 lea esp,[esp+0x0] 8d742600 lea esi,[esi+0x0] 8d7c2700 lea edi,[edi+0x0] 8d842000000000 lea eax,[eax+0x0] 8d8c2100000000 lea ecx,[ecx+0x0] 8d942200000000 lea edx,[edx+0x0] 8d9c2300000000 lea ebx,[ebx+0x0] 8da42400000000 lea esp,[esp+0x0] 8db42600000000 lea esi,[esi+0x0] 8dbc2700000000 lea edi,[edi+0x0] 8d2c2d00000000 lea ebp,[ebp+0x0] The EBP variants don't exactly follow the pattern above. 8d6c2500 lea ebp,[ebp+0x0] 8dac2500000000 lea ebp,[ebp+0x0] 0f1f00 nop [eax] P4+ adds the 0f1f instruction. Each of these can be prefixed with the 0f1f4000 nop [eax+0x0] 0x66 operand size prefix. In fact, Intel recommends doing this now for the 0f1f440000 nop [eax+0x0] optimally efficient 6- and 9-byte sequences. 0f1f8000000000 nop [eax+0x0] 0f1f840000000000 nop [eax+0x0] 0f0dxx nop [xxx] The latest version of the manual implies that this sequence is also reserved for NOP, although I can find almost no references to it except in the latest instruction manual on page A-13 of volume 2B. It's also mentioned on x86asm.net. [CORY 2010-04] d9d0 fnop These aren't really no-ops on the chip, but are no-ops from the program's 9b wait perspective. Most of these instructions are related to improving cache 0f08 invd efficiency and performance, but otherwise do not affect the program 0f09 wbinvd behavior. 0f01c9 mwait 0f0138 invlpg [eax] 0f01bf00000000 invlpg [edi+0x0] and more... 0f18 /0 prefetchnta [xxx] 0f18 /1 prefetch0 [xxx] 0f18 /2 prefetch1 [xxx] 0f18 /3 prefetch2 [xxx] 0fae /5 lfence [xxx] 0fae /6 mfence [xxx] 0fae /7 sfence [xxx] 0f18xx through 0f1exx This opcode rante is officially undefined but is probably reserved for no-ops as well. Any instructions encountered in this range are probably consequences of bad code and should be ingored. JMP, Jcc, PUSH/RET, etc. Branches are considered no-ops if they can be proven to always branch to the fall-through address.
Reimplemented from SgAsmInstruction.
| bool SgAsmx86Instruction::has_effect | ( | const std::vector< SgAsmInstruction * > & | insns, | |
| bool | allow_branch = false, |
|||
| bool | relax_stack_semantics = false | |||
| ) | [virtual] |
Determines whether a sequence of instructions has an effect besides advancing the flow of control.
The specified list of instructions should be (part of) a basic block and the instructions are given in the order they would be executed. This function does not check that the instructions are actualy executed sequentially as specified, it just evaluates the machine state as if they had been executed sequentially. This can be useful when a basic block was built from control-flow information that is not available to this function.
An empty sequence of instructions has no effect (i.e., return value is false).
If the final instruction of the sequence results in an undetermined instruction pointer then the sequence is considered to have an effect (this situation usually results from a conditional jump). If the final instruction results in a known value for the instruction pointer, and the known value is the fall-through address then the final instruction is considered to have no effect. If the final instruction results in a known instruction pointer that is not the fall-through address then the final instruction has an effect only if allow_branch is false.
If relax_stack_semantics is true then each time the stack pointer is increased the memory locations below the new stack value are discarded. Typically, well behaved programs do not read stack data that is below the stack pointer.
"this" is only used to select the virtual function; the operation is performed on the specified instruction vector.
Reimplemented from SgAsmInstruction.
| std::vector< std::pair< size_t, size_t > > SgAsmx86Instruction::find_noop_subsequences | ( | const std::vector< SgAsmInstruction * > & | insns, | |
| bool | allow_branch = false, |
|||
| bool | relax_stack_semantics = false | |||
| ) | [virtual] |
Determines what subsequences of an instruction sequence have no cumulative effect.
The return value is a vector of pairs where each pair is the starting index and length of subsequence. The algorithm we use is to compute the machine state after each instruction and then look for pairs of states that are identical except for the instruction pointer. Like the vector version of has_effect(), the control-flow from the final instruction is treated specially depending on the allow_branch value, which defaults to false.
It is more efficient to call this function to find sequences than to call the vector version of has_effect() with various vectors. First, one doesn't have to construct all the different subsequences; second, the semantic analysis is performed only one time.
"this" is only used to select the virtual function; the operation is performed over the specified instruction vector.
Reimplemented from SgAsmInstruction.
| Disassembler::AddressSet SgAsmx86Instruction::get_successors | ( | bool * | complete | ) | [virtual] |
Reimplemented from SgAsmInstruction.
| Disassembler::AddressSet SgAsmx86Instruction::get_successors | ( | const std::vector< SgAsmInstruction * > & | , | |
| bool * | complete, | |||
| MemoryMap * | initial_memory = NULL | |||
| ) | [virtual] |
Reimplemented from SgAsmInstruction.
| bool SgAsmx86Instruction::is_unknown | ( | ) | const [virtual] |
Reimplemented from SgAsmInstruction.
| virtual std::string SgAsmx86Instruction::class_name | ( | ) | const [virtual] |
Copies AST (whole subtree, depending on the SgCopyHelp class returns a string representing the class name.
Reimplemented from SgAsmInstruction.
| virtual VariantT SgAsmx86Instruction::variantT | ( | ) | const [virtual] |
| void* SgAsmx86Instruction::operator new | ( | size_t | size | ) |
| void SgAsmx86Instruction::operator delete | ( | void * | pointer, | |
| size_t | size | |||
| ) |
deallocated memory for IR node (returns memory to memory pool for reuse)
Reimplemented from SgAsmInstruction.
| void SgAsmx86Instruction::operator delete | ( | void * | pointer | ) |
Reimplemented from SgAsmInstruction.
| static size_t SgAsmx86Instruction::numberOfNodes | ( | ) | [static] |
| static size_t SgAsmx86Instruction::memoryUsage | ( | ) | [static] |
Returns the size in bytes of the total memory allocated for all IR nodes of this type.
Reimplemented from SgAsmInstruction.
| virtual std::vector<SgNode*> SgAsmx86Instruction::get_traversalSuccessorContainer | ( | ) | [virtual] |
FOR INTERNAL USE within ROSE traverals mechanism only.
This function builds and returns a copy of ordered container holding pointers to children of this node in a traversal. It is associated with the definition of a tree that is travered by the AST traversal mechanism; a tree that is embeded in the AST (which is a more general graph). This function is used within the implementation of the AST traversal and has a semantics may change in subtle ways that makes it difficult to use in user code. It can return unexpected data members and thus the order and the number of elements is unpredicable and subject to change.
Reimplemented from SgAsmInstruction.
| virtual std::vector<std::string> SgAsmx86Instruction::get_traversalSuccessorNamesContainer | ( | ) | [virtual] |
FOR INTERNAL USE within ROSE traverals mechanism only.
This function builds and returns a copy of ordered container holding strings used to name data members that are traversed in the IR node. It is associated with the definition of a tree that is travered by the AST traversal mechanism; a tree that is embeded in the AST (which is a more general graph). This function is used within the implementation of the AST traversal and has a semantics may change in subtle ways that makes it difficult to use in user code. It can return unexpected data members and thus the order and the number of elements is unpredicable and subject to change.
Reimplemented from SgAsmInstruction.
| virtual size_t SgAsmx86Instruction::get_numberOfTraversalSuccessors | ( | ) | [virtual] |
Reimplemented from SgAsmInstruction.
| virtual SgNode* SgAsmx86Instruction::get_traversalSuccessorByIndex | ( | size_t | idx | ) | [virtual] |
Reimplemented from SgAsmInstruction.
| virtual size_t SgAsmx86Instruction::get_childIndex | ( | SgNode * | child | ) | [virtual] |
Reimplemented from SgAsmInstruction.
| virtual RTIReturnType SgAsmx86Instruction::roseRTI | ( | ) | [virtual] |
FOR INTERNAL USE Access to Runtime Type Information (RTI) for this IR nodes.
This function provides runtime type information for accessing the structure of the current node. It is useful for generating code which would dump out or rebuild IR nodes.
Reimplemented from SgAsmInstruction.
| virtual const char* SgAsmx86Instruction::sage_class_name | ( | ) | const [virtual] |
returns a C style string (char*) representing the class name
Reimplemented from SgAsmInstruction.
| void SgAsmx86Instruction::executeVisitorMemberFunction | ( | ROSE_VisitorPattern & | visitor | ) |
| virtual void SgAsmx86Instruction::accept | ( | ROSE_VisitorPattern & | visitor | ) | [virtual] |
DXN (08/09/2010): support for the classic visitor pattern done in GoF.
Reimplemented from SgAsmInstruction.
| static void SgAsmx86Instruction::traverseMemoryPoolNodes | ( | ROSE_VisitTraversal & | visit | ) | [static] |
| static void SgAsmx86Instruction::traverseMemoryPoolVisitorPattern | ( | ROSE_VisitorPattern & | visitor | ) | [static] |
| static void SgAsmx86Instruction::visitRepresentativeNode | ( | ROSE_VisitTraversal & | visit | ) | [static] |
| virtual bool SgAsmx86Instruction::isInMemoryPool | ( | ) | [virtual] |
FOR INTERNAL USE This is used in internal tests to verify that all IR nodes are allocated from the heap.
The AST File I/O depends upon the allocation of IR nodes being from the heap, stack based or global IR nodes should not appear in the AST if it will be written out to a file and read back in. To enforce this concept, this function implements a test to verify that the IR node can be found on the heap and is part of a larger test of the whole AST. This test must pass before the AST can be written out to a file. This is part of a compromise in the design of the AST File I/O to support binary streaming of data to files; for performance. It is also rather difficult, but possible, to build a useful AST with IR nodes allocated on the stack or frm global scope, this test filters out such cased from being used with the AST File I/O mechanism.
Reimplemented from SgAsmInstruction.
| virtual void SgAsmx86Instruction::checkDataMemberPointersIfInMemoryPool | ( | ) | [virtual] |
FOR INTERNAL USE This is used in internal tests to verify that all IR nodes are allocated from the heap.
The AST File I/O depends upon the allocation of IR nodes being from the heap, stack based or global IR nodes should not appear in the AST if it will be written out to a file and read back in. To enforce this concept, this function implements a test to verify that the IR node can be found on the heap and is part of a larger test of the whole AST. This test must pass before the AST can be written out to a file. This is part of a compromise in the design of the AST File I/O to support binary streaming of data to files; for performance. It is also rather difficult, but possible, to build a useful AST with IR nodes allocated on the stack or frm global scope, this test filters out such cased from being used with the AST File I/O mechanism.
Reimplemented from SgAsmInstruction.
| virtual std::vector<std::pair<SgNode*,std::string> > SgAsmx86Instruction::returnDataMemberPointers | ( | ) | const [virtual] |
FOR INTERNAL USE Returns STL vector of pairs of SgNode* and strings for use in AST tools
This functions is part of general support for many possible tools to operate on the AST. The forms a list of ALL IR node pointers used by each IR node, and is a supperset of the get_traversalSuccessorContainer(). It is (I think) less than the set of pointers used by the AST file I/O. This is part of work implemented by Andreas, and support tools such as the AST graph generation.
Reimplemented from SgAsmInstruction.
| virtual void SgAsmx86Instruction::processDataMemberReferenceToPointers | ( | ReferenceToPointerHandler * | ) | [virtual] |
FOR INTERNAL USE Processes pairs of references to SgNode* and strings for use in AST tools
This functions similar to returnDataMemberPointers() except that it passes references to a handler object. As a result there is FAR more damage that can be done by using this function, but it is type-safe. This is provided for support of internal tools that operate on the AST, e.g the AST Merge mechanism.
Reimplemented from SgAsmInstruction.
| virtual long SgAsmx86Instruction::getChildIndex | ( | SgNode * | childNode | ) | const [virtual] |
FOR INTERNAL USE Returns a unique index value for the childNode in the list of children at this IR node.
This function returns a unique value for the input childNode in set of children at this IR node. Note that a negative value indicates that the input node is not a child. This is the basis for the implementation of the isChild(SgNode*) member function. Data members that are NULL in the IR node are counted internally (so that this function returns value that could be statically defined, and so are not dynamically determined).
Reimplemented from SgAsmInstruction.
| SgAsmx86Instruction* SgAsmx86Instruction::addRegExpAttribute | ( | std::string | s, | |
| AstRegExAttribute * | a | |||
| ) |
Support for AST matching using regular expression.
This support is incomplete and the subject of current research to define RegEx trees to support inexact matching.
Reimplemented from SgAsmInstruction.
| X86InstructionKind SgAsmx86Instruction::get_kind | ( | ) | const |
| void SgAsmx86Instruction::set_kind | ( | X86InstructionKind | kind | ) |
| X86InstructionSize SgAsmx86Instruction::get_baseSize | ( | ) | const |
| void SgAsmx86Instruction::set_baseSize | ( | X86InstructionSize | baseSize | ) |
| X86InstructionSize SgAsmx86Instruction::get_operandSize | ( | ) | const |
| void SgAsmx86Instruction::set_operandSize | ( | X86InstructionSize | operandSize | ) |
| X86InstructionSize SgAsmx86Instruction::get_addressSize | ( | ) | const |
| void SgAsmx86Instruction::set_addressSize | ( | X86InstructionSize | addressSize | ) |
| bool SgAsmx86Instruction::get_lockPrefix | ( | ) | const |
| void SgAsmx86Instruction::set_lockPrefix | ( | bool | lockPrefix | ) |
| X86RepeatPrefix SgAsmx86Instruction::get_repeatPrefix | ( | ) | const |
| void SgAsmx86Instruction::set_repeatPrefix | ( | X86RepeatPrefix | repeatPrefix | ) |
| X86BranchPrediction SgAsmx86Instruction::get_branchPrediction | ( | ) | const |
| void SgAsmx86Instruction::set_branchPrediction | ( | X86BranchPrediction | branchPrediction | ) |
| X86SegmentRegister SgAsmx86Instruction::get_segmentOverride | ( | ) | const |
| void SgAsmx86Instruction::set_segmentOverride | ( | X86SegmentRegister | segmentOverride | ) |
friend class AST_FILE_IO [friend] |
Reimplemented from SgAsmInstruction.
friend class SgAsmx86InstructionStorageClass [friend] |
friend class AstSpecificDataManagingClass [friend] |
Reimplemented from SgAsmInstruction.
friend class AstSpecificDataManagingClassStorageClass [friend] |
Reimplemented from SgAsmInstruction.
| SgAsmx86Instruction* isSgAsmx86Instruction | ( | SgNode * | s | ) | [friend] |
Casts pointer from base class to derived class.
| const SgAsmx86Instruction* isSgAsmx86Instruction | ( | const SgNode * | s | ) | [friend] |
Casts pointer from base class to derived class (for const pointers).
| SgAsmx86Instruction* SgAsmx86Instruction_getPointerFromGlobalIndex | ( | unsigned long | globalIndex | ) | [friend] |
Constructor for use by AST File I/O MechanismTypedef used for low level memory access. Typedef used to hold memory addresses as values. Methods to find the pointer to a global and local index.
| unsigned long SgAsmx86Instruction_getNumberOfValidNodesAndSetGlobalIndexInFreepointer | ( | unsigned | long | ) | [friend] |
Get the size of the memory pool.
It actually returns the size of the whole blocks allocated, no matter they contain valid pointers or not.
| void SgAsmx86Instruction_clearMemoryPool | ( | ) | [friend] |
| void SgAsmx86Instruction_extendMemoryPoolForFileIO | ( | unsigned | long | ) | [friend] |
| void SgAsmx86Instruction_getNextValidPointer | ( | std::pair< SgAsmx86Instruction *, std::vector< unsigned char * >::const_iterator > & | ) | [friend] |
| void SgAsmx86Instruction_resetValidFreepointers | ( | ) | [friend] |
X86InstructionKind SgAsmx86Instruction::p_kind [protected] |
X86InstructionSize SgAsmx86Instruction::p_baseSize [protected] |
X86InstructionSize SgAsmx86Instruction::p_operandSize [protected] |
X86InstructionSize SgAsmx86Instruction::p_addressSize [protected] |
bool SgAsmx86Instruction::p_lockPrefix [protected] |
X86RepeatPrefix SgAsmx86Instruction::p_repeatPrefix [protected] |
1.4.7