ROSE  0.11.96.0
Classes | Public Types | Public Member Functions | List of all members
Rose::BinaryAnalysis::DisassemblerM68k Class Reference

Description

Disassembler for Motorola M68k-based instruction set architectures.

Definition at line 20 of file DisassemblerM68k.h.

#include <Rose/BinaryAnalysis/DisassemblerM68k.h>

Inheritance diagram for Rose::BinaryAnalysis::DisassemblerM68k:
Inheritance graph
[legend]
Collaboration diagram for Rose::BinaryAnalysis::DisassemblerM68k:
Collaboration graph
[legend]

Classes

class  M68k
 Interface for disassembling a single instruction. More...
 
struct  State
 

Public Types

typedef std::pair< SgAsmExpression *, SgAsmExpression * > ExpressionPair
 
- Public Types inherited from Rose::BinaryAnalysis::Disassembler
typedef Map< rose_addr_t, SgAsmInstruction * > InstructionMap
 The InstructionMap is a mapping from (absolute) virtual address to disassembled instruction. More...
 

Public Member Functions

 DisassemblerM68k (M68kFamily family)
 Constructor for a specific family. More...
 
virtual DisassemblerM68kclone () const override
 Creates a new copy of a disassembler. More...
 
virtual bool canDisassemble (SgAsmGenericHeader *) const override
 Predicate determining the suitability of a disassembler for a specific file header. More...
 
virtual SgAsmInstructiondisassembleOne (const MemoryMap::Ptr &, rose_addr_t start_va, AddressSet *successors=NULL) override
 This is the lowest level disassembly function and is implemented in the architecture-specific subclasses. More...
 
virtual SgAsmInstructionmakeUnknownInstruction (const Disassembler::Exception &) override
 Makes an unknown instruction from an exception. More...
 
virtual Unparser::BasePtr unparser () const override
 Unparser. More...
 
M68kfind_idis (uint16_t *insn_bytes, size_t nbytes) const
 Find an instruction-specific disassembler. More...
 
void insert_idis (M68k *)
 Insert an instruction-specific disassembler. More...
 
void start_instruction (State &state, const MemoryMap::Ptr &map, rose_addr_t start_va) const
 Called by disassembleOne() to initialize the disassembler state for the next instruction. More...
 
uint16_t instructionWord (State &, size_t n) const
 Return the Nth instruction word. More...
 
size_t extensionWordsUsed (State &) const
 Returns number of instruction words referenced so far in the current instruction. More...
 
SgAsmTypemakeType (State &, M68kDataFormat) const
 Create a ROSE data type for m68k data format. More...
 
SgAsmRegisterReferenceExpressionmakeDataRegister (State &, unsigned regnum, M68kDataFormat, size_t bit_offset=0) const
 Create a data register reference expression. More...
 
SgAsmRegisterReferenceExpressionmakeAddressRegister (State &, unsigned regnum, M68kDataFormat, size_t bit_offset=0) const
 Create an address register reference expression. More...
 
SgAsmMemoryReferenceExpressionmakeAddressRegisterPreDecrement (State &, unsigned regnum, M68kDataFormat fmt) const
 Make a memory reference expression using an address register in pre-decrement mode. More...
 
SgAsmMemoryReferenceExpressionmakeAddressRegisterPostIncrement (State &, unsigned regnum, M68kDataFormat fmt) const
 Make a memory reference expression using an address register in post-increment mode. More...
 
SgAsmRegisterReferenceExpressionmakeDataAddressRegister (State &, unsigned regnum, M68kDataFormat fmt, size_t bit_offset=0) const
 Create either a data or address register reference expression. More...
 
SgAsmRegisterNamesmakeRegistersFromMask (State &, unsigned mask, M68kDataFormat fmt, bool reverse=false) const
 Create a list of data and/or address registers. More...
 
SgAsmRegisterNamesmakeFPRegistersFromMask (State &, unsigned mask, M68kDataFormat fmt, bool reverse=false) const
 Create a list of floating-point data registers. More...
 
SgAsmRegisterReferenceExpressionmakeStatusRegister (State &) const
 Create a reference to the status register. More...
 
SgAsmRegisterReferenceExpressionmakeConditionCodeRegister (State &) const
 Create a reference to the condition code register. More...
 
SgAsmRegisterReferenceExpressionmakeColdFireControlRegister (State &, unsigned regnum) const
 Create control register for ColdFire cpu. More...
 
SgAsmRegisterReferenceExpressionmakeProgramCounter (State &) const
 Create a reference to the program counter register. More...
 
SgAsmRegisterReferenceExpressionmakeMacRegister (State &, M68kMacRegister) const
 Create a MAC register reference expression. More...
 
SgAsmRegisterReferenceExpressionmakeMacAccumulatorRegister (State &, unsigned accumIndex) const
 Create a MAC accumulator register. More...
 
SgAsmRegisterReferenceExpressionmakeFPRegister (State &, unsigned regnum) const
 Create a floating point register. More...
 
SgAsmRegisterReferenceExpressionmakeRegister (RegisterDescriptor) const
 Generic ways to make a register. More...
 
SgAsmIntegerValueExpressionmakeImmediateValue (State &, M68kDataFormat fmt, unsigned value) const
 Create an integer expression from a specified value. More...
 
SgAsmIntegerValueExpressionmakeImmediateExtension (State &, M68kDataFormat fmt, size_t ext_word_idx) const
 Create an integer expression from extension words. More...
 
SgAsmExpressionmakeAddress (State &, SgAsmExpression *expr) const
 Converts a memory-reference expression to an address. More...
 
ExpressionPair makeOffsetWidthPair (State &, unsigned extension_word) const
 Create an offset width pair from an extension word. More...
 
SgAsmM68kInstructionmakeInstruction (State &, M68kInstructionKind, const std::string &mnemonic, SgAsmExpression *arg0=NULL, SgAsmExpression *arg1=NULL, SgAsmExpression *arg2=NULL, SgAsmExpression *arg3=NULL, SgAsmExpression *arg4=NULL, SgAsmExpression *arg5=NULL, SgAsmExpression *arg6=NULL) const
 Build an instruction. More...
 
M68kFamily get_family () const
 Returns ISA family specified in constructor. More...
 
SgAsmExpressionmakeEffectiveAddress (State &, unsigned modreg, M68kDataFormat fmt, size_t ext_offset) const
 Create an expression for m68k "<ea>x" or "<ea>y". More...
 
SgAsmExpressionmakeEffectiveAddress (State &, unsigned mode, unsigned reg, M68kDataFormat fmt, size_t ext_offset) const
 Create an expression for m68k "<ea>x" or "<ea>y". More...
 
- Public Member Functions inherited from Rose::BinaryAnalysis::Disassembler
size_t instructionAlignment () const
 Property: Instruction alignment requirement. More...
 
virtual RegisterDescriptor instructionPointerRegister () const
 Returns the register that points to instructions. More...
 
virtual RegisterDescriptor stackPointerRegister () const
 Returns the register that points to the stack. More...
 
virtual RegisterDescriptor stackFrameRegister () const
 Returns the register that ponts to the stack frame. More...
 
virtual RegisterDescriptor stackSegmentRegister () const
 Returns the segment register for accessing the stack. More...
 
virtual RegisterDescriptor callReturnRegister () const
 Returns the register that holds the return address for a function. More...
 
const Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::DispatcherPtrdispatcher () const
 Return an instruction semantics dispatcher if possible. More...
 
SgAsmInstructiondisassembleOne (const unsigned char *buf, rose_addr_t buf_va, size_t buf_size, rose_addr_t start_va, AddressSet *successors=NULL)
 Similar in functionality to the disassembleOne method that takes a MemoryMap argument, except the content buffer is mapped 1:1 to virtual memory beginning at the specified address. More...
 
void mark_referenced_instructions (SgAsmInterpretation *, const MemoryMap::Ptr &, const InstructionMap &)
 Marks parts of the file that correspond to instructions as having been referenced. More...
 
AddressSet get_block_successors (const InstructionMap &, bool &complete)
 Calculates the successor addresses of a basic block and adds them to a successors set. More...
 
const std::string & name () const
 Property: Name by which disassembler is registered.
 
void name (const std::string &s)
 Property: Name by which disassembler is registered.
 
ByteOrder::Endianness byteOrder () const
 Property: Byte order of instructions in memory.
 
void byteOrder (ByteOrder::Endianness sex)
 Property: Byte order of instructions in memory.
 
size_t wordSizeBytes () const
 Property: Basic word size in bytes.
 
void wordSizeBytes (size_t nbytes)
 Property: Basic word size in bytes.
 
void registerDictionary (const RegisterDictionary *rdict)
 Properties: Register dictionary. More...
 
const RegisterDictionaryregisterDictionary () const
 Properties: Register dictionary. More...
 
const CallingConvention::DictionarycallingConventions () const
 Property: Calling convention dictionary. More...
 
CallingConvention::DictionarycallingConventions ()
 Properties: Register dictionary. More...
 
void callingConventions (const CallingConvention::Dictionary &d)
 Properties: Register dictionary. More...
 

Additional Inherited Members

- Static Public Member Functions inherited from Rose::BinaryAnalysis::Disassembler
static void registerSubclass (Disassembler *)
 Register a disassembler instance. More...
 
static Disassemblerlookup (SgAsmGenericHeader *)
 Finds a suitable disassembler. More...
 
static std::vector< std::string > isaNames ()
 List of names recognized by lookup. More...
 
static Disassemblerlookup (SgAsmInterpretation *)
 Finds a suitable disassembler. More...
 
static Disassemblerlookup (const std::string &)
 Finds a suitable disassembler. More...
 
static void initDiagnostics ()
 Initializes and registers disassembler diagnostic streams. More...
 
- Static Public Attributes inherited from Rose::BinaryAnalysis::Disassembler
static Sawyer::Message::Facility mlog
 Disassembler diagnostic streams. More...
 
- Protected Attributes inherited from Rose::BinaryAnalysis::Disassembler
const RegisterDictionaryp_registers
 Description of registers available for this platform. More...
 
RegisterDescriptor REG_IP
 
RegisterDescriptor REG_SP
 
RegisterDescriptor REG_SS
 
RegisterDescriptor REG_SF
 
RegisterDescriptor REG_LINK
 Register descriptors initialized during construction. More...
 
ByteOrder::Endianness p_byteOrder
 Byte order of instructions in memory. More...
 
size_t p_wordSizeBytes
 Basic word size in bytes. More...
 
std::string p_name
 Name by which this dissassembler is registered. More...
 
size_t instructionAlignment_
 Positive alignment constraint for instruction addresses. More...
 
InstructionSemantics::BaseSemantics::DispatcherPtr p_proto_dispatcher
 Prototypical dispatcher for creating real dispatchers.
 
- Static Protected Attributes inherited from Rose::BinaryAnalysis::Disassembler
static std::vector< Disassembler * > disassemblers
 List of disassembler subclasses. More...
 

Constructor & Destructor Documentation

Rose::BinaryAnalysis::DisassemblerM68k::DisassemblerM68k ( M68kFamily  family)
inlineexplicit

Constructor for a specific family.

The family argument selectively activates certain features of the generic m68k disassembler. For instance, to get a disassembler specific to the FreeScale ColdFire series using "ISA_B", invoke as:

Disassembler *disassembler = new DisassemblerM68k(m68k_freescale_isab);

Definition at line 106 of file DisassemblerM68k.h.

Member Function Documentation

virtual DisassemblerM68k* Rose::BinaryAnalysis::DisassemblerM68k::clone ( ) const
inlineoverridevirtual

Creates a new copy of a disassembler.

The new copy has all the same settings as the original.

Thread safety: The thread safety of this virtual method depends on the implementation in the subclass.

Implements Rose::BinaryAnalysis::Disassembler.

Definition at line 110 of file DisassemblerM68k.h.

virtual bool Rose::BinaryAnalysis::DisassemblerM68k::canDisassemble ( SgAsmGenericHeader ) const
overridevirtual

Predicate determining the suitability of a disassembler for a specific file header.

If this disassembler is capable of disassembling machine code described by the specified file header, then this predicate returns true, otherwise it returns false.

Thread safety: The thread safety of this virtual method depends on the implementation in the subclass.

Implements Rose::BinaryAnalysis::Disassembler.

virtual SgAsmInstruction* Rose::BinaryAnalysis::DisassemblerM68k::disassembleOne ( const MemoryMap::Ptr map,
rose_addr_t  start_va,
AddressSet successors = NULL 
)
overridevirtual

This is the lowest level disassembly function and is implemented in the architecture-specific subclasses.

It disassembles one instruction at the specified virtual address. The map is a mapping from virtual addresses to buffer and enables instructions to span file segments that are mapped contiguously in virtual memory by the loader but which might not be contiguous in the file. The instruction's successor virtual addresses are added to the optional successor set (note that successors of an individual instruction can also be obtained via SgAsmInstruction::getSuccessors). If the instruction cannot be disassembled then an exception is thrown and the successors set is not modified.

Thread safety: The safety of this method depends on its implementation in the subclass. In any case, no other thread can be modifying the MemoryMap or successors set at the same time.

Implements Rose::BinaryAnalysis::Disassembler.

virtual SgAsmInstruction* Rose::BinaryAnalysis::DisassemblerM68k::makeUnknownInstruction ( const Disassembler::Exception )
overridevirtual

Makes an unknown instruction from an exception.

Thread safety: The safety of this method depends on its implementation in the subclass.

Implements Rose::BinaryAnalysis::Disassembler.

virtual Unparser::BasePtr Rose::BinaryAnalysis::DisassemblerM68k::unparser ( ) const
overridevirtual

Unparser.

Returns an unparser suitable for unparsing the same instruction set architecture as recognized and produced by this disassembler.

Implements Rose::BinaryAnalysis::Disassembler.

M68k* Rose::BinaryAnalysis::DisassemblerM68k::find_idis ( uint16_t *  insn_bytes,
size_t  nbytes 
) const

Find an instruction-specific disassembler.

Using the specified instruction bits, search for and return an instruction-specific disassembler. Returns null if no appropriate disassembler can be found. Instruction-specific disassemblers know how to disassemble specific instruction types (or groups of closely related instructions).

void Rose::BinaryAnalysis::DisassemblerM68k::insert_idis ( M68k )

Insert an instruction-specific disassembler.

The table must not already contain an entry that has the same mask and match values. The pointers are managed by the caller and must not be deleted while they are in the table.

void Rose::BinaryAnalysis::DisassemblerM68k::start_instruction ( State state,
const MemoryMap::Ptr map,
rose_addr_t  start_va 
) const
inline
uint16_t Rose::BinaryAnalysis::DisassemblerM68k::instructionWord ( State ,
size_t  n 
) const

Return the Nth instruction word.

size_t Rose::BinaryAnalysis::DisassemblerM68k::extensionWordsUsed ( State ) const

Returns number of instruction words referenced so far in the current instruction.

SgAsmType* Rose::BinaryAnalysis::DisassemblerM68k::makeType ( State ,
M68kDataFormat   
) const

Create a ROSE data type for m68k data format.

SgAsmRegisterReferenceExpression* Rose::BinaryAnalysis::DisassemblerM68k::makeDataRegister ( State ,
unsigned  regnum,
M68kDataFormat  ,
size_t  bit_offset = 0 
) const

Create a data register reference expression.

SgAsmRegisterReferenceExpression* Rose::BinaryAnalysis::DisassemblerM68k::makeAddressRegister ( State ,
unsigned  regnum,
M68kDataFormat  ,
size_t  bit_offset = 0 
) const

Create an address register reference expression.

SgAsmMemoryReferenceExpression* Rose::BinaryAnalysis::DisassemblerM68k::makeAddressRegisterPreDecrement ( State ,
unsigned  regnum,
M68kDataFormat  fmt 
) const

Make a memory reference expression using an address register in pre-decrement mode.

The fmt is the format of the memory reference; all 32-bits of the address register are accessed.

SgAsmMemoryReferenceExpression* Rose::BinaryAnalysis::DisassemblerM68k::makeAddressRegisterPostIncrement ( State ,
unsigned  regnum,
M68kDataFormat  fmt 
) const

Make a memory reference expression using an address register in post-increment mode.

The fmt is the format of the memory reference; all 32-bits of the address register are accessed.

SgAsmRegisterReferenceExpression* Rose::BinaryAnalysis::DisassemblerM68k::makeDataAddressRegister ( State ,
unsigned  regnum,
M68kDataFormat  fmt,
size_t  bit_offset = 0 
) const

Create either a data or address register reference expression.

When regnum is zero through seven a data register is created; when regnum is eight through 15 an address register is created.

SgAsmRegisterNames* Rose::BinaryAnalysis::DisassemblerM68k::makeRegistersFromMask ( State ,
unsigned  mask,
M68kDataFormat  fmt,
bool  reverse = false 
) const

Create a list of data and/or address registers.

The bit mask indicates the registers. Starting at the least significant bit, the register are either: D0, D1, ... D7, A0, A1, ... A7 if reverse is false, or A7, A6, ... A0, D7, D6, ... D0 if reverse is true. The returned list has the registers in order starting at the least significant bit.

SgAsmRegisterNames* Rose::BinaryAnalysis::DisassemblerM68k::makeFPRegistersFromMask ( State ,
unsigned  mask,
M68kDataFormat  fmt,
bool  reverse = false 
) const

Create a list of floating-point data registers.

The bit mask indicates the registers. Starting at the least significant bit, the registers are either: FP0 through FP7 if reverse is false, or FP7 through FP0 if reverse is true. The returned list has the registers in order starting at the least significant bit.

SgAsmRegisterReferenceExpression* Rose::BinaryAnalysis::DisassemblerM68k::makeStatusRegister ( State ) const

Create a reference to the status register.

SgAsmRegisterReferenceExpression* Rose::BinaryAnalysis::DisassemblerM68k::makeConditionCodeRegister ( State ) const

Create a reference to the condition code register.

This is the low-order 8 bits of the status register.

SgAsmRegisterReferenceExpression* Rose::BinaryAnalysis::DisassemblerM68k::makeColdFireControlRegister ( State ,
unsigned  regnum 
) const

Create control register for ColdFire cpu.

SgAsmRegisterReferenceExpression* Rose::BinaryAnalysis::DisassemblerM68k::makeProgramCounter ( State ) const

Create a reference to the program counter register.

SgAsmRegisterReferenceExpression* Rose::BinaryAnalysis::DisassemblerM68k::makeMacRegister ( State ,
M68kMacRegister   
) const

Create a MAC register reference expression.

SgAsmRegisterReferenceExpression* Rose::BinaryAnalysis::DisassemblerM68k::makeMacAccumulatorRegister ( State ,
unsigned  accumIndex 
) const

Create a MAC accumulator register.

These are ACC0 through ACC3, 32-bit integers.

SgAsmRegisterReferenceExpression* Rose::BinaryAnalysis::DisassemblerM68k::makeFPRegister ( State ,
unsigned  regnum 
) const

Create a floating point register.

Floating point registers are different sizes on different platforms. For example, the M68040 has 80-bit registers that can store 96-bit extended-precision real values (16-bits of which are zero), but the follow on FreeScale ColdFire processors have only 64-bit registers that hold double-precision real values.

SgAsmRegisterReferenceExpression* Rose::BinaryAnalysis::DisassemblerM68k::makeRegister ( RegisterDescriptor  ) const

Generic ways to make a register.

SgAsmIntegerValueExpression* Rose::BinaryAnalysis::DisassemblerM68k::makeImmediateValue ( State ,
M68kDataFormat  fmt,
unsigned  value 
) const

Create an integer expression from a specified value.

SgAsmIntegerValueExpression* Rose::BinaryAnalysis::DisassemblerM68k::makeImmediateExtension ( State ,
M68kDataFormat  fmt,
size_t  ext_word_idx 
) const

Create an integer expression from extension words.

SgAsmExpression* Rose::BinaryAnalysis::DisassemblerM68k::makeEffectiveAddress ( State ,
unsigned  modreg,
M68kDataFormat  fmt,
size_t  ext_offset 
) const

Create an expression for m68k "<ea>x" or "<ea>y".

The modreg is a six-bit value whose high-order three bits are the addressing mode and whose low-order three bits are (usually) a register number. The return value has a type of the specified data format. The ext_offset indicates how many instruction extension words have already been consumed.

SgAsmExpression* Rose::BinaryAnalysis::DisassemblerM68k::makeEffectiveAddress ( State ,
unsigned  mode,
unsigned  reg,
M68kDataFormat  fmt,
size_t  ext_offset 
) const

Create an expression for m68k "<ea>x" or "<ea>y".

The modreg is a six-bit value whose high-order three bits are the addressing mode and whose low-order three bits are (usually) a register number. The return value has a type of the specified data format. The ext_offset indicates how many instruction extension words have already been consumed.

SgAsmExpression* Rose::BinaryAnalysis::DisassemblerM68k::makeAddress ( State ,
SgAsmExpression expr 
) const

Converts a memory-reference expression to an address.

This is used for things like the JSR instruction that takes an effective address that's a memory reference, and converts it to just an address. It also rewrites PC-relative addresses since the PC is constant.

ExpressionPair Rose::BinaryAnalysis::DisassemblerM68k::makeOffsetWidthPair ( State ,
unsigned  extension_word 
) const

Create an offset width pair from an extension word.

The extension word contains an offset and width expression each of which is either a 5-bit unsigned integer or a data register number. This is used by various bit field instructions.

SgAsmM68kInstruction* Rose::BinaryAnalysis::DisassemblerM68k::makeInstruction ( State ,
M68kInstructionKind  ,
const std::string &  mnemonic,
SgAsmExpression arg0 = NULL,
SgAsmExpression arg1 = NULL,
SgAsmExpression arg2 = NULL,
SgAsmExpression arg3 = NULL,
SgAsmExpression arg4 = NULL,
SgAsmExpression arg5 = NULL,
SgAsmExpression arg6 = NULL 
) const

Build an instruction.

M68kFamily Rose::BinaryAnalysis::DisassemblerM68k::get_family ( ) const
inline

Returns ISA family specified in constructor.

Definition at line 237 of file DisassemblerM68k.h.


The documentation for this class was generated from the following file: