ROSE 0.11.145.354
Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86 Member List

This is the complete list of members for Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86, including all inherited members.

AccessMode enum name (defined in Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86)Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86
addressWidth() constRose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher
advanceInstructionPointer(SgAsmInstruction *)Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatchervirtual
architecture() constRose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher
autoResetInstructionPointer() constRose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcherinline
autoResetInstructionPointer(bool b)Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcherinline
autoResetInstructionPointer_Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcherprotected
callReturnRegister() constRose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatchervirtual
create(const BaseSemantics::RiscOperatorsPtr &) const overrideRose::BinaryAnalysis::InstructionSemantics::DispatcherX86virtual
currentInstruction() constRose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatchervirtual
currentState() constRose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatchervirtual
decrementRegisters(SgAsmExpression *)Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatchervirtual
Dispatcher() (defined in Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher)Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcherprotected
Dispatcher(const Architecture::BaseConstPtr &) (defined in Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher)Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcherexplicitprotected
Dispatcher(const Architecture::BaseConstPtr &, const RiscOperatorsPtr &) (defined in Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher)Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcherprotected
DispatcherX86(const Architecture::BaseConstPtr &) (defined in Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86)Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86protected
DispatcherX86(const Architecture::BaseConstPtr &, const BaseSemantics::RiscOperatorsPtr &) (defined in Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86)Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86protected
doAddOperation(BaseSemantics::SValuePtr a, BaseSemantics::SValuePtr b, bool invertCarries, const BaseSemantics::SValuePtr &carryIn)Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86virtual
doAddOperation(BaseSemantics::SValuePtr a, BaseSemantics::SValuePtr b, bool invertCarries, const BaseSemantics::SValuePtr &carryIn, const BaseSemantics::SValuePtr &cond)Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86virtual
doIncOperation(const BaseSemantics::SValuePtr &a, bool dec, bool setCarry)Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86virtual
doRotateOperation(X86InstructionKind kind, const BaseSemantics::SValuePtr &operand, const BaseSemantics::SValuePtr &total_rotate, size_t rotateSignificantBits)Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86virtual
doShiftOperation(X86InstructionKind kind, const BaseSemantics::SValuePtr &operand, const BaseSemantics::SValuePtr &source_bits, const BaseSemantics::SValuePtr &total_shift, size_t shiftSignificantBits)Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86virtual
effectiveAddress(SgAsmExpression *, size_t nbits=0)Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatchervirtual
findRegister(const std::string &regname, size_t nbits=0, bool allowMissing=false) constRose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatchervirtual
fixMemoryAddress(const BaseSemantics::SValuePtr &address) constRose::BinaryAnalysis::InstructionSemantics::DispatcherX86virtual
flagsCombo(X86InstructionKind k)Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86virtual
get_usual_registers() constRose::BinaryAnalysis::InstructionSemantics::DispatcherX86virtual
greaterOrEqualToTen(const BaseSemantics::SValuePtr &value)Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86virtual
incrementRegisters(SgAsmExpression *)Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatchervirtual
initializeState(const BaseSemantics::StatePtr &) overrideRose::BinaryAnalysis::InstructionSemantics::DispatcherX86virtual
InsnProcessors typedef (defined in Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher)Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcherprotected
instance(const Architecture::BaseConstPtr &)Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86static
instance(const Architecture::BaseConstPtr &, const BaseSemantics::RiscOperatorsPtr &)Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86static
instructionPointerRegister() const overrideRose::BinaryAnalysis::InstructionSemantics::DispatcherX86virtual
invertMaybe(const BaseSemantics::SValuePtr &value, bool maybe)Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86virtual
iproc_init()Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86
iproc_table (defined in Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher)Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcherprotected
iprocGet(int key)Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatchervirtual
iprocKey(SgAsmInstruction *insn_) const overrideRose::BinaryAnalysis::InstructionSemantics::DispatcherX86virtual
iprocLookup(SgAsmInstruction *insn)Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatchervirtual
iprocReplace(SgAsmInstruction *insn, InsnProcessor *iproc)Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatchervirtual
iprocSet(int key, InsnProcessor *iproc)Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatchervirtual
memory_init()Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86
number_(size_t nbits, uint64_t number) constRose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatchervirtual
operators() constRose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatchervirtual
operators(const RiscOperatorsPtr &)Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatchervirtual
parity(const BaseSemantics::SValuePtr &v)Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86virtual
PEEK_REGISTER enum value (defined in Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86)Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86
popFloatingPoint()Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86virtual
postUpdate(SgAsmExpression *, const BaseSemantics::SValuePtr &enabled)Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatchervirtual
preUpdate(SgAsmExpression *, const BaseSemantics::SValuePtr &enabled)Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatchervirtual
processCommon() (defined in Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher)Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcherprotectedvirtual
processDelaySlot(SgAsmInstruction *delayInsn)Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatchervirtual
processInstruction(SgAsmInstruction *insn)Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatchervirtual
processorMode() constRose::BinaryAnalysis::InstructionSemantics::DispatcherX86inline
processorMode(X86InstructionSize m)Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86inline
processorMode_ (defined in Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86)Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86protected
promote(const BaseSemantics::DispatcherPtr &)Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86static
protoval() constRose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatchervirtual
Ptr typedefRose::BinaryAnalysis::InstructionSemantics::DispatcherX86
pushFloatingPoint(const BaseSemantics::SValuePtr &valueToPush)Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86virtual
read(SgAsmExpression *, size_t value_nbits=0, size_t addr_nbits=0)Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatchervirtual
READ_REGISTER enum value (defined in Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86)Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86
readFloatingPointStack(size_t position)Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86virtual
readRegister(RegisterDescriptor, AccessMode mode=READ_REGISTER)Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86virtual
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regcache_init()Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86
registerDictionary() constRose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher
repEnter(X86RepeatPrefix)Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86virtual
repLeave(X86RepeatPrefix, const BaseSemantics::SValuePtr &in_loop, Address insn_va, bool honorZeroFlag)Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86virtual
saturateSignedToSigned(const BaseSemantics::SValuePtr &, size_t narrowerWidth)Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86virtual
saturateSignedToUnsigned(const BaseSemantics::SValuePtr &, size_t narrowerWidth)Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86virtual
saturateUnsignedToUnsigned(const BaseSemantics::SValuePtr &, size_t narrowerWidth)Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86virtual
segmentRegister(SgAsmMemoryReferenceExpression *)Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatchervirtual
setFlagsForResult(const BaseSemantics::SValuePtr &result)Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86virtual
setFlagsForResult(const BaseSemantics::SValuePtr &result, const BaseSemantics::SValuePtr &cond)Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86virtual
stackFrameRegister() const overrideRose::BinaryAnalysis::InstructionSemantics::DispatcherX86virtual
stackPointerRegister() const overrideRose::BinaryAnalysis::InstructionSemantics::DispatcherX86virtual
Super typedefRose::BinaryAnalysis::InstructionSemantics::DispatcherX86
undefined_(size_t nbits) constRose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatchervirtual
unspecified_(size_t nbits) constRose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatchervirtual
write(SgAsmExpression *e, const BaseSemantics::SValuePtr &value, size_t addr_nbits=0) overrideRose::BinaryAnalysis::InstructionSemantics::DispatcherX86virtual
writeRegister(RegisterDescriptor, const BaseSemantics::SValuePtr &result)Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86virtual
~Dispatcher() (defined in Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher)Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatchervirtual
~DispatcherX86() (defined in Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86)Rose::BinaryAnalysis::InstructionSemantics::DispatcherX86
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